#ifndef __PL1167_H
#define __PL1167_H


sbit PRF_MISO	= P1^0;
sbit PRF_MOSI	= P1^1;
sbit PRF_SCK 	= P1^2;
sbit PRF_SCSB = P1^3;
sbit PRF_FIFO = P1^4;
sbit PRF_RSTB = P1^5;
sbit PRF_PKT 	= P1^6;


#define PRF_MOSI_H    (PRF_MOSI = 1)
#define PRF_MOSI_L    (PRF_MOSI = 0)
#define PRF_SCK_H     (PRF_SCK = 1)
#define PRF_SCK_L     (PRF_SCK = 0)
#define PRF_RSTB_H		(PRF_RSTB = 1)
#define PRF_RSTB_L		(PRF_RSTB = 0)
#define PRF_SCSB_H		(PRF_SCSB = 1)
#define PRF_SCSB_L		(PRF_SCSB = 0)

#define SpiDelay() 

#define PRF_INIT_TAB_LEN	    31

//Prf register map
#define PRF_RF_SYN_LOCK				0x03	//RF Synthesizer Lock Status Register
#define PRF_RAW_RSSI					0x06	//RAW RSSI Value Register
#define PRF_TX_RX_CH					0x07	//TX/RX Enable and Channel Register
#define PRF_PA_CTR						0x09	//PA Control Register
#define PRF_RSSI_OFF					0x0B	//RSSI OFF Control Register
#define PRF_EN_VCO_CAL				0x17	//VCO Calibration Enable Register
#define PRF_DAT_CFG						0x20	//Data Configure Register
#define PRF_DLY_TM_CTR0				0x21	//Delay Time Control Register 0
#define PRF_DLY_TM_CTR1				0x22	//Delay Time Control Register 1
#define PRF_PM_MISC						0x23	//Power Management and Miscellaneous Register
#define PRF_SYNCWORD0					0x24	//SYNCWORD Register 0
#define PRF_SYNCWORD1					0x25	//SYNCWORD Register 1
#define PRF_SYNCWORD2					0x26	//SYNCWORD Register 2
#define PRF_SYNCWORD3					0x27	//SYNCWORD Register 3
#define PRF_FIFO_SYNWORD_TH		0x28	//FIFO and SYNCWORD Threshold Register
#define PRF_MISC							0x29	//Miscellaneous Register
#define PRF_SCAN_RSSI0				0x2A	//SCAN RSSI Register 0
#define PRF_SCAN_RSSI1				0x2B	//SCAN RSSI Register 1
#define PRF_STATUS						0x30	//Status Register
#define PRF_FIFO_DAT					0x32	//FIFO Data Register
#define PRF_FIFO_PTR					0x34	//FIFO Pointer Register
//Prf read regster address = (REG_ADDR|PRF_REG_RD)
#define	PRF_REG_RD						0x80

//pa gain
#define PRF_PA_GAIN_MASK			0x0780
#define PRF_PA_GAIN_BIS				0x07
#define PRF_PA_GAIN_P5DBM			0x00
#define PRF_PA_GAIN_N15DBM		0x0F
//crc
#define PRF_STATUS_CRC_MASK		0x8000
#define PRF_STATUS_CRC_ERR		0x8000
#define PRF_STATUS_CRC_OK			0x0000
//rssi
#define PRF_RAW_RSSI_MASK			0xFC00
#define PRF_RAW_RSSI_BIS			0x0A
//ptr
#define PRF_FIFO_WR_PTR_MASK	0x3F00
#define PRF_FIFO_WR_PTR_BIS		0x08
#define PRF_FIFO_RD_PTR_MASK	0x003F
#define PRF_FIFO_RD_PTR_BIS		0x00

#define	TX_ENABLE	(1L<<0x08)
#define	RX_ENABLE	(1L<<0x07)

#define CLR_W_PTR			0x8000
#define CLR_R_PTR			0x0080
#define CLR_WR_PTR		0x8080

#define PRF_IDLE	0x00
#define PRF_RX		0x01
#define PRF_TX		0x02



//#define RF_GAP	35						//30=3.5us, time constant between succesive RF register accesses


void PrfInit(void);
void PrfSetModeCh(uint8_t mode, uint8_t ch);
void PrfWrFifo(uint8_t *ptr, uint8_t len);
void PrfRdFifo(uint8_t *ptr, uint8_t len);
void PrfClrTxRxPtr(void);
void PrfSleep(void);
void PrfWakeup(void);
void PrfSetRx(void);
void PrfTxPtr(uint8_t *ptr, uint8_t ch);

void PrfWrRegPtr(uint8_t reg, uint8_t *ptr, uint8_t len);
void PrfRdRegPtr(uint8_t reg, uint8_t *ptr, uint8_t len);
void PrfPortInit(void);
void SpiWr8(uint8_t dat);
uint8_t SpiRd8(void);

void PrfDemoInit(void);
void PrfRxDemoProc(void);
void PrfTxDemoProc(void);


#endif	//__PL1167_H
